Design and verify full subtractor by using dataflow style with select statement. - Code

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Friday, October 7, 2011

Design and verify full subtractor by using dataflow style with select statement.

FULL SUBTRACTOR
AIM:


Design and verify full subtractor by using data flow style with select statement.
PROGRAM:


library ieee;
use ieee.std_logic_1164.all;
entity f lsub_select is
port(a:in bit_vector(2 downto 0);
s:out bit_vector(1 downto 0));
end flsub_select;
architecture beh of flsub_select is
begin
with a select
s<=("00") when "000", ("11") when "001", ("11") when "010", ("01") when "011", ("10") when "100", ("00") when "101", ("00") when "110", ("11") when "111"; end beh; SIMULATION OUTPUT:












RESULT: Full subtractor using dataflow style with select statem ent is sim ulated and
verified.

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